复位管理芯片只在管脚的电压超过触发阈值电压和管理器内部复位周期结束时,产生输出。这个延时时间滤除了所有输入电压的毛刺。因为Q1的导通,使C1的负向变为地。而C1的正向不能立即改变极性,其被拉低并通过输入的内部上拉电阻,缓慢的再次充电。当达到复位芯片的阈值电压时,一旦达到芯片的延时时间便输出复位信号。C1的选择并不严格。然而,它的值应该尽量大——例如0.1到10µF——使C1和内部上拉电阻所得的RC时间常数足够大。这个值确保C1在引脚上保持了至少1us的低电平。 C2充电到Q1的偏置电压后,晶体管仍然导通。在下一次上电或手动按键复位电路时,晶体管C2放电。这个动作一旦发生,Q1关闭。R1将C1的负向充电到供电电压VDD。因为电容C1的正向不能立即改变,其表现为充电到2VDD。然而,保护二极管D1将C1的电压箝位到仅为VDD加上二极管的导通电压。一旦C2充电足够使Q1再次导通时,重复循环。 英文原文: IC pe By adding a transistor with some capacitors, diodes, and resistors, you can transform a pure-manual reset to an automatic reset with adjustable hold time for the reset IC. Goh Ban Hok, Infineon Technologies Asia Pacific Ltd, Singapore; Edited by Charles H Small and Fran Granville -- EDN, 2/7/2008 In most applications, the (manual-reset) pin usually connects to a switch to create a manual-reset signal to the supervisory chip. Subsequently, after a predetermined time-out-active period, it goes back to the high state in an active-low reset. A manual reset is a good feature for most applications; however, it requires human intervention to create the reset. In some applications, a manual reset could be a hassle because you must perform it each time the system powers up. Further, applications involving embedded microprocessors can require the reset output to hold high—that is, inactive—for a certain period of time before you can apply the reset, or active low. The circuit in Figure 1 proves usefulduring power-up when there is no need to press the reset button once the device powers up, because reset occurs automatically with the predetermined hold time before you apply the reset-low signal.
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